1. Field of the Invention
This invention relates to digital controller emulators and particularly to emulators coupled to slow processors to emulate a faster controller.
Peripheral devices coupled to channels of a fast host controller are called channel driven devices as contrasted with devices driven by serial or parallel interface drivers. There are many advantages to the channel driven procedure, the most important being speed and less host interventions, freeing the host to perform other tasks.
When a limited amount of host processing is required to drive a device, it is more economical to use a lower priced processor for the host. For example, personal computers can usually handle the amount of processing needed to control a single device but the small processors do not operate at the high speeds required to service channel driven devices.
2. Description of Related Art
Emulators are known in the prior art but are usually slower than the target controllers, i.e., the controllers or processors they emulate. They are commonly employed to produce the output equivalent of the target controller or processor but at a slower speed.
U.S. Pat. No. 4,447,867 discloses an emulator control sequencer synchronized to the fetch-execute cycles of a microprocessor. It monitors the data bus and certain status lines while the microprocessor is running to predict when operation codes will be fetched and to inhibit certain cycles while supplying miscellaneous control and status signals to emulate the execution of an operation.
In U.S. Pat. No. 4,441,154, a microprocessor is provided with an emulator mode so that it can be combined with external devices to emulate a composite system for software development.
The teachings of the patents, like other prior art emulators, are directed to supplying signals that would be generated by operations that are not part of the processor and do not operate faster than the target processor.
While useful for extending the functional capabilities of processors with limited instruction sets, the prior art emulators fail to provide the speed of execution and response of the target processor while operating under the control of a slower processor.